Glossary entry (derived from question below)
English term or phrase:
pull-up resistor
Chinese translation:
上拉电阻(器)/上拉電阻(器）
Added to glossary by
Adsion Liu
Apr 9, 2010 14:54
14 yrs ago
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English term
pull-up resistor
GBK
English to Chinese
Tech/Engineering
Electronics / Elect Eng
Definition from
Sealevel Systems, Inc.:
A resistor used to pull a logic input "up" to the high state, or logic-1 state, thus preventing a disconnected input from floating into an undetermined state.
Example sentences:
Without an internal pull-up enabled in our circuit, the button would be "floating" when open and ground when pushed. We want it to be a digital high when open. We need the pull-up resistor. (Micah Carrick)
Once again, modern parts require lower currents, but if a switch seems to be unreliable, try increasing the current by reducing the value of the pull-up resistor. (The errant engineer)
So determine if parts count or cost come into play with this design, are you building 3 prototypes or 10,000 units [to determine the cost and impact of the resistor]. Next determine if the resistor is really required, check the IC logic family being used, it may or may not require a pull-up resistor. (Leroy Davis)
Proposed translations
(Chinese)
| 4 +4 | 上拉电阻(器) |
Adsion Liu
|
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Apr 9, 2010 14:34: changed "Kudoz queue" from "In queue" to "Public"
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Apr 12, 2010 16:54: changed "Stage" from "Selection" to "Completion"
Apr 12, 2010 16:58: Adsion Liu changed "Edited KOG entry" from "<a href="/profile/0">'s</a> old entry - "pull-up resistor"" to ""上拉电阻(器)""
Proposed translations
+4
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Adsion Liu
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上拉电阻(器)
Traditional Chinese: 上拉電阻(器）
Definition from
YAHOO:
在数字逻辑电路中，由于某些引脚空闲不用，又不能悬空着，通常用一适当的电阻接+vcc（上拉）或地（下拉）。具体使用上拉或下拉要看设计而定，大多不能随意改变。当然电阻本身是没有什么区别的。<br />上拉电阻： <br />1、当TTL电路驱动COMS电路时，如果TTL电路输出的高电平低于COMS电路的最低高电平（一般为3.5V），这时就需要在TTL的输出端接上拉电阻，以提高输出高电平的值。 <br />2、OC门电路必须加上拉电阻，才能使用。 <br />3、为加大输出引脚的驱动能力，有的单片机管脚上也常使用上拉电阻。 <br />4、在COMS芯片上，为了防止静电造成损坏，不用的管脚不能悬空，一般接上拉电阻产生降低输入阻抗，提供泄荷通路。 <br />5、芯片的管脚加上拉电阻来提高输出电平，从而提高芯片输入信号的噪声容限增强抗干扰能力。 <br />6、提高总线的抗电磁干扰能力。管脚悬空就比较容易接受外界的电磁干扰。 <br />7、长线传输中电阻不匹配容易引起反射波干扰，加上下拉电阻是电阻匹配，有效的抑制反射波干扰。 <br /><br />上拉电阻阻值的选择原则包括: <br />1、从节约功耗及芯片的灌电流能力考虑应当足够大；电阻大，电流小。 <br />2、从确保足够的驱动电流考虑应当足够小；电阻小，电流大。 <br />3、对于高速电路，过大的上拉电阻可能边沿变平缓。综合考虑 <br />以上三点,通常在1k到10k之间选取。对下拉电阻也有类似道理
Example sentences:
上拉是对器件注入电流，下拉是输出电流；弱强只是上拉电阻的阻值不同，没有什么严格区分；对于非集电极（或漏极）开路输出型电路（如普通门电路）提升 ... (http://forum.eepw.com.cn)
上拉是对器件注入电流，下拉是输出电流；弱强只是上拉电阻的阻值不同，没有什么严格区分；对于非集电极（或漏极）开路输出型电路（如普通门电路）提升电流和电压的能力 ... (http://baike.baidu.com)
上拉電阻：pull up1、當TTL電路驅動COMS電路時，如果TTL電路輸出的高電平低於COMS電路的最低高電平（一般為3.5V），這時就需要在TTL的輸出端接上拉電阻，以提高輸出高 ... (http://kelvin820.pixnet.net)
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